Hardware Accelerator Approach Towards Efficient Biometrics Cryptosystems (CITeR)

Biometric cryptosystems combine biometrics and cryptography at a level that allows biometric matching to effectively take place in the cryptography domain. This is practically attractive to cloud computing scenario when strong emphasize is put on the integrity of the biometric data (templates). Even though biometric cryptosystems can provide enhanced level of security, the need to access and process the data at ideally real-time for large datasets poses great challenge. We propose to design specialized hardware accelerators to meet the computation demand associated in design and implement such systems. We propose to design customized hardware accelerator in the form of IP (intellectual property) correspondingly. The work will be developed using hardware description language and implemented on FPGA (Field Programmable Gate Arrays) platform. We will validate our proposed approach by comparing the difference in terms of performance, power consumption and energy efficiency against the traditional approaches without hardware accelerators. This research project will facilitate the efforts to make biometric cryptosystems more widely deployed in security identification for both industry and government, targeting at the future cloud-computing platform.

The source code for this project can be downloaded from Github. We would appreciate if you reference to this paper (http://dx.doi.org/10.1117/12.2177269) for the code.

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